What: Trends and Challenges by Jagdish Doma, former director of VLSI design for Conexant Systems
When: Thursday, 20th August, 6:30pm to 8:00pm
Where: Venture Center, NCL Innovation Park, Pashan Road. To reach Venture Center, go past NCL towards Pashan, pass the cricket ground adjacent to NCL and then you’ll find NCL Innovation Park / Venture Center on the right hand side. Map
Registration and fees: This event is free for all to attend. No registration required.
ASIC verification – Trends and Challenges
Jagdish will discuss the ASIC verification flow, various verification and validation techniques, and strength areas and limitations of each technique and the key challenges faced by companies during the ASIC verification cycle.
About the speaker – Jagdish Doma
Jagdish served as Director of VLSI Division for Conexant Systems in Pune where he was responsible for managing diverse teams involved in design, verification, validation, implementation, physical design and software development. During his 19 year career, Jagdish has held various senoir techical positions at Texas Instruments, Cirrus Logic and AMD. He brings a wide range of experience in Architecture, Design, pre-silicon verification, post-silicon validation and leading organizations to successful product development. Jagdish holds Bachelor’s in Electrical Engineering from University of Pune and a Master’s in Electrical Engineering fromTexas A&M University.
PuneChips is a special interest group on semiconductor design and applications. PuneChips was formed to foster an environment for growth of companies in the semiconductor design and applications segment in the Pune area. Our goal is to build an ecosystem similar to PuneTech for companies in this field, where they can exchange information, consult with experts, and start and grow their businesses.
PuneChips has been started by Abhijit Athavale, president and CEO of Markonix, and a high-tech marketing consultant. He has 16+ years of high-technology industry experience. Prior to Markonix, Abhijit spent over 11 years at Xilinx, Inc. in various engineering, applications and marketing roles. In his role as a marketing consultant, he has held executive management positions at several companies. He has a masters degree in electrical engineering from Texas A&M University and a bachelors degree in electrical engineering from University of Pune. He is an accomplished speaker and author of several publications including a book.
For more information, see the PuneTech wiki profile of PuneChips, and/or join the PuneChips mailing list.
Please forward this mail to anybody in Pune who is interested in semiconductors, chip design, VLSI design, chip testing, and embedded applications.
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2 thoughts on “PuneChips Event: ASIC Verification trends and challenges – Jagdish Doma, former director of VLSI design Conexant Systems – 20 Aug”
bsnl & other telecom industries import their pcb plates from abroad for msc& bsc. can we not provide them that plates in india dis’ll increase the oppurtuinty for electronics engineering